1. Field of Invention
The present invention relates to photoelectrochemical etching (PEC) for chip shaping of light emitting diodes (LEDs).
2. Description of the Related Art
(Note: This application references a number of different publications as indicated throughout the specification by one or more reference numbers within brackets, e.g., [x]. A list of these different publications ordered according to these reference numbers can be found below in the section entitled “References.” Each of these publications is incorporated by reference herein.)
In LEDs, especially in GaN (gallium nitride) and GaP (gallium phosphide) based devices, external quantum efficiency is limited by light emitted into guided modes trapped in the material. Typically, when wafers are diced, the resulting sidewalls are smooth and vertical, resulting in most of the light reflecting back into the material, where it is eventually lost, with only a small percentage of light being extracted into air.
A number of previous patents and research articles have discussed the benefits of modifying the geometry or shape of an LED chip to overcome these problems. For example, it is well known [1-6] that chip shaping into a pyramidal geometry will dramatically increase extraction efficiency, because light has a much higher probability of being incident on the sloped sidewalls at less than the critical angle for extraction into air. However, such designs are generally not rectilinear (a straight line), e.g., the side surface (not parallel to the epitaxial layers) are formed at distinctive angles relative to the normal (i.e., the surface normal).
Chip shaping may involve shaping of the LED device and material, accompanied by shaping of the substrate material, which may be of different composition (e.g., sapphire). Typically, wafers are shaped into this geometry by mechanical sawing using a beveled blade [1], wet etching of a foreign submount [3,5], or dry etch shaping using an etch mask with inclined facets [4] or a zero-bias etch [6].
Generally, etching is the preferred method. However, in III-V semiconductor based devices, etching processes are limited because there is no simple wet etch available. Moreover, both wet and dry etching gives very little control over the angle of the resulting etched sidewalls, providing few options for chip shapes.
Consequently, there is a need in the art for improved etching processes for chip shaping of III-V semiconductor based devices. The present invention satisfies this need.